Analog circuit design, power supply design, control theory, high-speed
digital logic design and layout, ATE system design, and LabVIEW programming.
Senior Applications Engineer 2006 to April 2009
Linear Technology Corp. Santa Barbara CA
Worked closely with customers to develop circuits for their applications.
Designed demo boards and GUI software for LTC
and failure analysis on customer hardware.
Wrote data sheets, application notes, magazine articles, and marketing docs.
Private Consultant 2005 to 2006
Thetis Engineering Corp. Calabasas, CA
Worked with customers to troubleshoot and design new products.
Active participant in the IEEE 802.3at Task Force, working to develop the new Power
over Ethernet (PoE) standard.
Hardware Engineer 2001 to 2005
team of 15 engineers to develop a Bit Error Rate Tester (BERT) capable of 43Gbps. This product won the “Best Telecom
Test Product” award from Frost and Sullivan in 2003. An article about this project was on the cover of EE Times.
Lead a team of 6 engineers to develop the industry’s
first tester for Power over Ethernet (PoE) Power Sourcing Equipment (PSE). This was a multi-channel electronic load with high-speed
data acquisition and special control features.
Was the go-to guy for all analog issues such as power supplies, phase-locked loops, jitter and eye-pattern issues,
high-speed digital layout, and thermal problems.
Often provided tech support for marketing at customer demos and trade shows.
Member of Technical Staff
1989 to 2001
Boeing (formerly Rocketdyne). Canoga Park, CA
Lead teams of engineers on several large ATE system projects for the
International Space Station (ISS), Space Shuttle, and Delta IV programs. Tasks included everything from defining system requirements
to detailed circuit design.
chosen to lead a panel of ATE experts from Boeing facilities all across the USA. Developed standards and methods for ATE system
RF Engineer 1985 to 1989
Teledyne Electronics. Newbury Park, CA
Designed receivers for Identification Friend of Foe (IFF) systems. (These
are similar to radar receivers.)
Designed a special digital signal processor for IFF systems.
Designed several hybrid circuit assemblies for IFF receivers including high-speed
A/D converters, and log amps.
Designed ATE system and
software to test IFF receivers.